T2M USB 3.2 OTG Controller and PHY IP Cores China

全球独立的半导体IP供应商和授权专业公司T2MIP高兴地宣布，来自其伙伴的 USB 3.2 OTG 控制器和 PHY IP 通过硅验证，这个USB解决方案来自量产的芯片组，这个方案是工业级和消费类应用数据传输的基础IP，客户可选择在主流晶圆厂的12nm工艺节点量产

USB 3.2 OTG 控制器和 PHY IP 收发器包括USB 3.2 OTG、主机和外设应用，可按照US 3.2的规范配置为20Gbps（双通道）或 10Gbps的接口速率。这个组合IP支持设备模式和主机模式，在设备模式下，连接的端子数量、接口类型及配置参数可以动态调整；在主机模式下，可以配置为HUB设备。这个USB 3.2 的设计采用了通用的驱动程序，无论工作于何种模式都实现了驱动程序复用，帮助客户最大程度降低软件研发投入以及各种形式的硬件驱动电路适配中存在的不确定风险。


USB 3.2 OTG 控制器 IP支持块读写、中断和同步模式等所有类型的 USB 传输。这个设计支持 USB 规范所定义的各种低功耗功能，包括挂起、远程唤醒以及 USB 3.0 和 USB 2.0所定义的 链路电源管理状态机。另外还支持各种 USB 2.0 测试模式功能、 USB IF 认证所需的 USB 3.0 合规性和 USB 3.0 环回模式等功能。这个设计也支持 RSP、SRP、HNP 和 ADP 等 OTG 功能，以及这些功能从软件侧进行的开关控制。

USB 3.2 PHY IP 支持 USB 3.2 、USB 2.0 、UTMI+ 和 PIPE4.0 规范的要求。这个设计包括高速混合信号电路，支持USB 3.2 Gen2和Gen1吞吐量的规格，后向兼容USB 2.0规范的高速 （480Mbps）、全速 （12Mbps） 和低速 （1.5Mbps） 等配置，这个PHY 设计还包含有源开关电路，实现支持双向插拔和USB Type-C形式接口所定义的特定功能；电路的时钟可以选择25MHz晶体振荡器电路和数字系统供应的外部时钟源；这个设计还包括集成有源开关电路，以支持USB Type-C 连接器的双向或单向数据连接；这个设计在量产时可以选择金属键合或倒装芯片的封装规格。

USB 3.2 OTG 控制器和 PHY IP在12nm、28nm 和  40nm 上得到了量产验证，可应用于半导体行业的扫描仪、数码相机、可移动媒体驱动器、大容量存储设备、显示接口连接和扩展坞应用、云计算、汽车应用、消费类应用、智能手机和其他工业用途芯片的设计。

除了USB 3.2控制器和PHY IP，T2M广泛的硅接口IP核组合包括USB、HDMI、DP、MIPI（CSI、DSI、UniPro、UFS、Soundwire、I3C）、PCIe、10/100/1000以太网、V by One、可编程SerDes、SD/eMMC、串行ATA和更多的IP核，这些设计在主流制造厂的工艺节点可达7nm,并且可以根据客户的具体要求定制或者移植到其他晶圆厂的相应工艺节点上生产。

可用性：这些半导体IP可以立即对客户进行授权，既可以单独授权，也可与预集成的控制器和PHY组合授权。有关授权的选择和报价等更多信息，请发送邮件至contact@t-2-m.com，进行了解。

关于T2M：T2MIP是全球独立的半导体专业授权技术公司，提供复杂的半导体IP、软件、KGD和颠覆性技术，帮助客户加速开发可穿戴设备、物联网、通信、存储、服务 www.t2m-ip.cn

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