T2M IP Complex Semiconductor Silicon IP Cores Company

  T2M IP , the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s 16G Multiprotocol SerDes PHY IP Core in 28HPC + process node which is silicon proven and in mass production with its superfast data transfer speed, low power and low die area providing a highly reliable system. The 16G Multiprotocol SerDes PHY IP Core supports PCIe 4.0 , JESD204B , 10G ethernet, rapid IO, and CPRI protocols. This allows the Serdes PHY to be implemented into a diverse range of applications based SoCs. Boasting a Low power and Low Die area, the PHY’s lower power consumption is achieved due to support of additional PLL control, reference clock control, and embedded power gating control. Also, with configurable low power mode, the PHY is widely applicable for various scenarios under different consideration of power consumption.  The multiple Protocols allows for the capability of handling various applicatio