HDMI 2-0 Rx PHY IP Cores in 12FFC process Technology with matching Controller

 

T2M-IP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce its HDMI 2.0 Rx PHY IP cores, Silicon Proven in 12FFC process technology along with matching Controller IP Cores available immediately for licensing. The HDMI 2.0 Rx IP cores provides a best-in-class Receiver functionalities for a lossless display interface in ultra-high-definition multimedia SoCs.

 This HDMI 2.0 Rx PHY IP Cores in 12FFC with matching Controller IP cores confirms with HDMI standard version 2.0b and offers a full HDMI receiver capability. It is made up of two modules: a link module and a physical layer (PHY). The link module is implemented as a synthesizable soft IP core, whereas the PHY IP core is fully compatible with DVI receiver and implemented as a hard IP based on 28HPC+ CMOS logic process. The transmission of audio-visual material is secured by an integrated HDCP (High-bandwidth Digital Content Protection) encryption.


Keeping up with the ever-increasing demands for better Audio-Video technologies, the 12nm FFC technology of the HDMI 2.0 Rx PHY IP cores has a wide range of channel speeds up to 6.0Gbps. HDMI 2.0 Rx PHY IP cores in 12FFC supports HDCP 2.2/HDCP 1.4 along with CEA-861F/VESA DMT up to 4K x 2K resolution. The layered architecture of the PHY enables 3D formats (Frame packing/Side by Side Half/Top & Bottom) for a truly next-Gen experience. Embracing a new age of Displays the HDMI 2.0 PHY IP cores are also able to support Deep Color Mode at 24, 30, and 36 bit per pixel with a programmable color space converter that includes BT601/709/2020(NonConst)/RGB/xvYCC. Boasting adjustable analog characteristics, the IP Cores provides access to I2S, S/PDIF and DSD audios over a 1.8V/0.9V power supply.

 The HDMI 2.0 Rx Controller IP cores provide a synthesizable design that is easily integrated into any SoC and supports a variety of host bus interfaces enabling a, perfect Link Layer and PHY integration. With a full HDMI sink functionality compatible with DVI and Dual-Link DVI Standards, the Link layer is able to support Variable Refresh Rate (VRR), Fast Vactive (FVA), Forward Error Correction (FEC) and display data channel (DDC) for a smooth and effective sync with the 12FFC process technology PHY.

 With multiple licenses and mass productions, the HDMI 2.0 Rx PHY IP and Controller IP Cores has been used in the semiconductor industry’s Multimedia devices such as Televisions, Personal Computers, Virtual Ad Boards, Automotive, and other Consumer Electronics….

In addition to HDMI 2.0 Rx PHY and Controller IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, PCIe, Serial ATA, HDMI, Display Port, MIPI, DDR, programmable SerDes, SD/eMMCs, 1G Ethernet and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 6nm. They can also be ported to other foundries and leading-edge processes nodes on request...

About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

Comments

Post a Comment

Popular posts from this blog

USB 3.0, PCIe 2.0, SATA 3.0 Combo PHY IP Cores Next Gen Chipsets

Image
  T2M IP , the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s Silicon Proven and mature USB 3.0, PCIe 2.0 and SATA 3.0 PHY IP Cores with a successful mass production track record in 22nm Ultra Low Power and 8nm advanced process technology in a wide range of major Fabs . This advanced PHY IP is poised to revolutionize data transfer solutions with its versatile compatibility and power-efficient design, making it ideal for a wide range of applications, from consumer electronics to high-performance computing systems. Licensed to a host of Global customers, the Combo PHY IP cores integrates three essential high-speed interface standards: USB 3.0, PCIe 2.0, and SATA 3.0 offering extensive compatibility, meeting the full specifications of each protocol. This integration not only enhances device connectivity but also simplifies system design and reduces overall cost. This wide-ranging compa
Read more

MIPI CSI 2 Tx Rx Silicon Proven Controller IP Cores

Image
 T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s MIPI Alliance Standard MIPI CSI-2 v2.0 Tx and Rx Controller IP Cores for all types of High performance Camera applications. The CSI-2 Tx and Rx IP Cores are Production Proven and have been integrated with matching PHY’s in different process nodes in major Fabs. The MIPI Camera Serial Interface (CSI-2) is an interface between a camera and an image-processing engine. MIPI CSI Transmitter and Receiver adheres to MIPI CSI-2, MIPI D-PHY and MIPI C-PHY specification. The MIPI CSI-2 Transmitter along with MIPI CSI-2 Receiver and MIPI DPHY provides a complete solution for encoding MIPI data. The Layered architecture allows for 4 virtual configurable channels and Colour modes of 16, 18, 24 and 36 bpp. The Controllers can also support YUV420 8, YUV422 8, RGB 888, 565, 666, 555 & 444 and RAW 6, 7, 8, 10, 12 & 14 The MIPI CSI-2 v2.0 T
Read more